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CIS Seminar: “Reducing Errors in Quantum Computation via Program Transformation”
November 19, 2019 at 3:00 PM - 4:00 PM
Quantum computing promises exponential speedups for an important class of problems. While quantum computers with few dozens of qubits have been demonstrated, these machines suffer from high rate of gate errors. Such machines are operated in the Noisy Intermediate Scale Quantum (NISQ) mode of computing where the output of the machine can be erroneous. In this talk, I will discuss some of our recent work that aims to improve the reliability of NISQ computers by developing software techniques to mitigate the hardware errors. Our first= work (ASPLOS 2019) exploits the variability in the error rates of qubits to steer more operations towards qubits with lower error rates and avoid qubits that are error-prone. Our second work (MICRO 2019) looks at executing different versions of the programs each crafted to cause diverse mistakes so that the machine becomes less vulnerable to correlated errors. Our third work (MICRO 2019) looks at exploiting the state-dependent bias in measurement errors (state 1 is more error prone than state 0) and dynamically flips the state of the qubit to perform the measurement in the stronger state. We perform our evaluations on real quantum machines from IBM and demonstrate significant improvement in the overall system reliability. If time permits, I will also briefly discuss the hardware aspect of designing quantum computers, including cryogenic processor and cryogenic memory system.
Professor of Electrical and Computer Engineering at the Georgia Institute of Technology
Moinuddin Qureshi is a Professor of Electrical and Computer Engineering at the Georgia Institute of Technology. His research interests include computer architecture, memory systems, hardware security, and quantum computing. Previously, he was a Research Staff Member (2007- 2011) at IBM T.J. Watson Research Center, where he developed the caching algorithms for Power-7 processors. Prof. Qureshi has published more than 40 papers in top-tier architecture conferences and his research has received close to 9000 citations. He is a member of the Hall of Fame of ISCA, Hall of Fame of MICRO, and Hall of Fame of HPCA. His research has been recognized with the best paper awards at MICRO 2018, CF 2019, and two selections (and three honorable mentions) at IEEE MICRO Top Picks. His ISCA 2009 paper on Phase Change Memory was recently awarded the 2019 Persistent Impact Prize in recognition of “exceptional impact on the fields of study related to non-volatile memories”. He was the Program Chair of MICRO 2015 and Selection Committee Co-Chair of Top Picks 2017. He received his Ph.D. (2007) and M.S. (2003) from the University of Texas at Austin.