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CIS Seminar: “Designing Hardware for Cryptography and Cryptography for Hardware”

October 27, 2022 at 3:30 PM - 4:30 PM

There have been few high-impact deployments of hardware implementations of cryptographic primitives. 
We present the benefits and challenges of hardware acceleration of sophisticated cryptographic primitives 
and protocols, and describe our recent design work in accelerating Fully Homomorphic Encryption by three 
to four orders of magnitude using programmable hardware accelerators. We argue the significant potential 
for synergistic codesign of cryptography and hardware, where customized hardware accelerates cryptographic 
protocols that are designed with hardware acceleration in mind.

Joint work with Daniel Sanchez's group at MIT.

Srini Devadas

Webster Professor of EECS at the Massachusetts Institute of Technology

Srini Devadas is the Webster Professor of EECS at the Massachusetts Institute of Technology, where he 
has been on the faculty since 1988. Devadas's current research interests are in computer architecture, 
computer security, and applied cryptography.  He is a Fellow of the IEEE and ACM. In 2021, he received 
the IEEE Cybersecurity Award for Practice, and the ACM SIGSAC Award for Outstanding Innovation. Devadas 
is a MacVicar Faculty Fellow and an Everett Moore Baker teaching award recipient, considered MIT's two 
highest undergraduate teaching honors.


October 27, 2022
3:30 PM - 4:30 PM
Event Tags:


Computer and Information Science
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Wu and Chen Auditorium (Room 101), Levine Hall
3330 Walnut Street
Philadelphia, PA 19104 United States
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