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ESE Seminar: “Software, Architecture, and VLSI Co-Design for Efficient Task-Based Parallel Runtimes”

March 14, 2019 at 11:00 AM - 12:00 PM

Fast-paced changes across the computing stack are creating opportunities for innovation by bridging software, architecture, and VLSI. Cross-cutting research is challenging, but it can expose key insights that would otherwise be hidden by abstractions. In this talk, I will demonstrate a cross-stack approach to improve the efficiency of task-based parallel runtimes, which are important because they underpin the parallelization of state-of-the-art graph analytics and machine learning frameworks. Shifting the focus downward, I will discuss a cross-stack approach that addresses key circuit-level challenges in integrated voltage regulation. To finish the talk, I will discuss my future plans to apply a cross-stack research approach to expand beyond the perceived limits of intelligence on the edge and also to decrease the challenges of complex ASIC design with hardware design techniques based on Lego-like tiling.

Christopher Torng

PhD Candidate of Electrical and Computer Engineering, Cornell University

Christopher Torng is a Ph.D. student at Cornell University in the School of Electrical and Computer Engineering, where he also received his B.S. degree. He builds specialized architectures that tie together software with the underlying technology. His activities have resulted in a selection as a Rising Star in Computer Architecture (2018) by Georgia Tech and an IEEE MICRO Top Pick from Hot Chips (2018). He has also been involved with six research test chips that support his research, and he was the project or university lead for three of the chips. In his spare time, Chris enjoys figure skating on the ice.


March 14, 2019
11:00 AM - 12:00 PM
Event Tags:


Electrical and Systems Engineering
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Room 337, Towne Building
220 South 33rd Street
Philadelphia, PA 19104 United States
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