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“Compressive Sensing: From Algorithms to Circuits”

September 5, 2019 at 10:30 AM - 11:30 AM

Compressive Sensing is an acquisition technique which relies on the sparsity of the underlying signals, to enable sampling below the classical Nyquist rate. To do so, the signals must be acquired in an incoherent way with respect to the sparsity basis, which is classically obtained in practice by acquiring the signal through projection on a random PAM signal with i.i.d. symbols.

We first show that advantages with respect to the above “classical” compressive sensing approach can be achieved by exploiting the fact that, while sparsity is not under a system designer’s control, incoherence is, and therefore flexibility and creativity in implementing compressed sensing systems rely on the strategic design and control of incoherence. To accomplish this, we then assume that the signals to be acquired are not only sparse, but also localized, e.g. for nearly all practical applications, the signals of interest preferentially occupy a given subspace (for instance they are all low-pass or high-pass in the frequency domain). We show how, for localized signals, the acquisition sequences can be designed to maximize their “rakeness,” that is, to maximize their capability to collect the energy of the samples during the acquisition phase and increase by several dBs the average SNR achieved in signal reconstruction.

We will then describe the design in a 0.18um CMOS technology of the most popular architecture for implementing A/D converters based on compressive sensing, namely the Random Modulation Pre-Integration (RMPI). We will show that the direct circuit implementation of the classical acquisition scheme exploiting i.i.d sequences leads to a highly suboptimal solution, and one needs therefore to follow a synergetic design between algorithm-circuit-system. We will show how the use of rakeness-based CS acquisition sequences can reduce the complexity of the implemented A/D from 16 to 8 stages for processing ECG signals and from 64 to 24 for EMG ones. Furthermore, rakeness-derived sequences also eliminate the necessity for pre- or post-acquisition filtering stages intended to suppress high frequency artifacts and 60-Hz power-line noise interference.

Finally, we will show how the use of CS guarantee some level of privacy in information transmission, which makes the CS signal acquisition paradigm even more suitable for applications in the area of Body Area Networks and Internet of Things.

Gianluca Setti

Professor, Electronics for Signal and Data Processing at Politecnicno di Tornino, Italy

Bio: Gianluca Setti received a Dr. Eng. degree (honors) and a Ph.D. degree in Electronic Engineering from the University of Bologna, in 1992 and in 1997. From 1997 to 2017 he was with the Department of Engineering, University of Ferrara, Italy, as an Assistant- (1998-2000), Associate- (2001-2008) and as a Professor (2009-2017) of Circuit Theory and Analog Electronics. Since December 2017 he is a Professor of Electronics, Signal and Data Processing at the Department of Electronics and Telecommunications (DET) of Politecnico di Torino, Italy.

Dr. Setti has held various visiting positions, most recently at the University of Washington, at IBM T. J. Watson Laboratories, and at EPFL (Lausanne).

His research interests include nonlinear circuits, recurrent neural networks, statistical signal processing, electromagnetic compatibility, compressive sensing and statistical signal processing, biomedical circuits and systems, power electronics, design and implementation of IoT nodes, circuits and systems for machine learning.

He is the recipient of numerous awards, including the 2004 IEEE Circuits and Systems (CAS) Society Darlington Award, the 2013 IEEE CASS Guellemin-Cauer Award, the 2013 IEEE CASS Meritorious Service Award and the 2019 IEEE Transactions on Biomedical Circuits and Systems Best Paper Award.

He was a Distinguished Lecturer of the IEEE CAS Society (2004-2005 and 2013-2014) of the same Society, a member of the CASS Board of Governors (2005-2008), and served as the 2010 CAS Society President, as well as the 2018 General Chair of the IEEE International Symposium on Circuits and Systems (ISCAS) in Florence, Italy.

In 2012, he was the Chair of the IEEE Strategic Planning Committee of the Publication Services and Products Board (PSPB-SPC) and in 2013-2014 he was the first non North-American Vice President of the IEEE for Publication Services and Products. He is currently service as Editor-in-chief of the Proceedings of the IEEE.


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