ESE Seminar: “Liquid Silicon: A New Computing Paradigm Enabled by Monolithic 3D Cross-Point Memory”

Almost every subfield of electrical engineering and computer science are undergoing disruptive times. With Moore’s Law coming to an end, an expanded roadmap for semiconductors beyond traditional CMOS scaling becomes unclear. At the other end, traditional application software development is being replaced by emerging machine learning techniques whose success will, in turn, rely on the availability of powerful, efficient and flexible computer systems. Due to these emerging applications, architecture is transitioning from mainstream CPU to heterogeneous and diverse options such as GPU, TPU, etc. The confluence of these key trends has created a wide efficiency gap, due to the mismatch between emerging application requirements and the relatively slow evolutionary improvements in existing CMOS-based computer hardware.

To close the gap, in this talk, I will present a reconfigurable memory-oriented computing fabric, namely Liquid Silicon (L-Si) by leveraging the monolithic 3D stacking capability of RRAM. L-Si addresses several key fundamental limitations of state-of-the-art reconfigurable architectures including FPGA, etc. in supporting emerging data-/search-intensive applications (e.g., machine learning and neural networks) through a series of innovations. It, for the first time, extends the configuration capabilities of existing reconfigurable architectures (FPGA, CGRA) from computation to the whole spectrum, from full memory to full computation, or intermediate states in between (partial memory and partial computation). Thus, it allows users more flexibility in customizing hardware to better match an application’s characteristics, for higher performance and energy efficiency. The talk will consist of four parts, technology, architecture, compiler tool, and algorithm, with a combined EE and CS flavor.