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ESE Seminar: “AI and Intelligent IC/Accelerator Design: A Synergistic Approach”

October 1, 2019 at 11:00 AM - 12:00 PM

The recent artificial intelligence (AI) boom has been largely driven by three confluence forces: algorithms, big data, and computing power enabled by modern integrated circuits (ICs) including specialized AI accelerators. In this talk, I will present a synergistic approach on AI and intelligent IC/accelerator designs with two main themes, AI for IC and IC for AI. As the semiconductor technology enters the era of extreme scaling, IC design and manufacturing complexities are becoming extremely high. More intelligent and agile IC design technologies are needed than ever to optimize performance, power, area, manufacturability, reliability, security, etc., and to deliver equivalent scaling to Moore’s Law. I will present some recent results leveraging modern AI and machine learning advancement with domain-specific customizations for agile IC design and manufacturing closure. Meanwhile, customized IC can drastically improve AI performance and energy efficiency by orders of magnitude. I will present the hardware/software co-design for energy-efficient neural networks. The bidirectional reinforcement of AI and IC technologies holds great potential to significantly advance the state-of-the-art of each other.

David Pan

Professor of Electrical and Computer Engineering, The University of Texas at Austin

David Z. Pan received his BS degree in Physics from Peking University and his MS/PhD degrees in Computer Science from UCLA. From 2000 to 2003, he was a Research Staff Member with the IBM T. J. Watson Research Center. He is currently Engineering Foundation Professor at the Department of Electrical and Computer Engineering, The University of Texas at Austin. He is also currently a Visiting Professor/Scientist at MIT EECS/MTL. His research interests include bidirectional AI and IC interaction, cross-layer design for manufacturability, reliability, security, CAD for analog/mixed-signal designs and emerging technologies. He has published over 350 refereed journal/conference papers and 8 US patents. He has served in many journal editorial boards and conference committees, including various leadership roles (e.g., ICCAD 2019 General Chair, ASPDAC 2017 Program Chair, DAC 2014 Executive Committee, ISPD 2008 General Chair). He is an elected member of the ACM/SIGDA Executive Committee, serving as Award Chair, and a member of Board of Governors of IEEE Council on Electronic Design Automation (CEDA).

He has received many awards, including SRC Technical Excellence Award, 17 Best Paper Awards (DAC 2019, GLSVLSI 2018, VLSI Integration 2018, HOST 2017, SPIE 2016, ISPD 2014, ICCAD 2013, ASPDAC 2012, ISPD 2011, IBM Research Pat Goldberg Memorial Best Paper Award in CS/EE/Math 2010, ASPDAC 2010, DATE 2009, ICICDT 2009, SRC Techcon in 1998, 2007, 2012 and 2015) and 13 additional Best Paper Award nominations/finalists, DAC Top 10 Author Award in Fifth Decade, ASPDAC Frequently Cited Author Award, Communications of ACM Research Highlights, ACM/SIGDA Outstanding New Faculty Award, NSF CAREER Award, IBM Faculty Award (4 times), UCLA Engineering Distinguished Young Alumnus Award, UT Austin RAISE Faculty Excellence Award, Cadence Academic Collaboration Award, and many international CAD contest awards, among others.

He has graduated 29 PhD students who have won many awards, including the First Place of ACM Student Research Competition Grand Finals in 2018, ACM/SIGDA Student Research Competition Gold Medal (twice), ACM Outstanding PhD Dissertation in EDA Award (twice), EDAA Outstanding Dissertation Award (twice), and so on.

He is a Fellow of IEEE and SPIE.


Electrical and Systems Engineering


PICS Conference Room 534 – A Wing , 5th Floor
3401 Walnut Street
Philadelphia, PA 19104 United States
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