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ESE Fall Seminar – “From Circuits to Cognition: Silicon for Embodied Intelligence”
October 30 at 11:00 AM - 12:00 PM
The next generation of intelligent and autonomous systems requires not only novel devices but also new silicon architectures and design workflows that transcend conventional approaches to deliver real-time learning, perception, and decision-making under severe power and resource constraints. In this talk, I will outline a cross-layer methodology for architecting silicon for embodied AI, from workload characterization and benchmarking to architecture exploration, compiler integration, and system prototyping. Central to this effort are compute-in-memory accelerators, mixed-signal neuromorphic architectures, and memory-centric SoCs that integrate hybrid RRAM/SRAM arrays, all designed within workflow frameworks that couple algorithmic needs with hardware capabilities. Case studies will highlight reconfigurable streaming-dataflow architectures for reasoning and decision-making, heterogeneous SoCs optimized for autonomous workloads, and bio-mimetic silicon platforms for navigation and planning. By unifying design flows, benchmarking, and circuit innovation, this work illustrates how silicon architectures can be systematically engineered to achieve the transparency, energy efficiency, and adaptability demanded by embodied intelligence and autonomy.
Arijit Raychowdhury
Steve W. Chaddick School Chair and Professor in the School of Electrical and Computer Engineering, Georgia Tech
Arijit Raychowdhury is the Steve W. Chaddick School Chair and Professor in the School of Electrical and Computer Engineering at Georgia Tech, where he oversees one of the largest ECE programs in the U.S., leading efforts in academia-industry-government partnerships, curriculum innovation, and strategic research initiatives. He has pioneered the launch of Georgia Tech’s AI MakerSpace, the largest computing cluster in the country dedicated to student education. His research spans energy-efficient VLSI design, hardware accelerators, and mixed-signal integrated circuits. He has authored more than 350 papers, holds over 30 U.S. patents. Prior to joining Georgia Tech, he was a Research Scientist at Intel Labs and Texas Instruments. At Georgia Tech, he leads large-scale research initiatives including the DARPA/SRC JUMP 2.0 Center on Co-Design of Cognitive Systems (CoCoSys). He is the winner of several prestigious awards, including the SRC Technical Excellence Award 2021, Qualcomm Faculty Awards in 2021, 2020, IEEE/ACM Innovator under 40 Award, the NSF CISE Research Initiation Initiative Award (CRII) 2015, Intel Labs Technical Contribution Award 2011, Dimitris N. Chorafas Award for outstanding doctoral research and best thesis 2007, and several fellowships. He and his students have won 18 best paper awards over the years. Dr. Raychowdhury is a Fellow of the IEEE.