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ESE Fall Seminar – “Diamond and GaN: Wide-Bandgap Allies for Thermal and Power Management from Devices to 3D-Stacked Chips”
November 4 at 11:00 AM - 12:00 PM
Once considered exotic, diamond and gallium nitride (GaN) have become practical enablers for next-generation electronic systems. Their convergence—diamond providing exceptional thermal conductivity and GaN delivering high-efficiency power conversion—lays the groundwork for integrated thermal–power co-design. As computing, RF, and high-performance systems push toward higher power densities, conventional packaging and cooling approaches struggle to manage buried hotspots and multilayer bottlenecks. In this talk, I’ll share our journey that began in 2015 with an unconventional idea—integrating thin-film polycrystalline diamond directly onto GaN high-electron-mobility transistors (HEMTs) while preserving their functionality. This effort led to some of our most significant findings, including the development of a low-temperature (400–500 °C), back-end-of-line (BEOL)–compatible diamond growth platform, now extended to silicon, oxides, and nitrides. Our “all-around” diamond-integrated GaN HEMTs achieved an average channel-temperature reduction of ~70 °C at 25 W/mm (DC) (IEDM ’22, ’23), while workload-representative, heater-based experiments demonstrated nearly a tenfold reduction in temperature rise within 3D architectures (IEDM ’24). In collaboration with Prof. Mitra’s team, we are advancing the thermal scaffolding paradigm for 3D chips—a concept that merges materials innovation with architectural design. It is exciting to build upon nearly two decades of GaN and diamond research—dating back to my Ph.D. work on vertical GaN transistors—and to see it evolving toward compact, energy-efficient, and thermally optimized electronics for the AI datacenter era. Much of our research has been carried out in close collaboration with industry partners, and some of our GaN efforts have already transitioned into industrial applications. I will also share some of the key lessons learned along the way, as well as the challenges that continue to shape this evolving field.
Srabanti Chowdhury
Professor of Electrical Engineering, Stanford University
Srabanti Chowdhury is a Professor of Electrical Engineering at Stanford University, with a courtesy appointment in Materials Science and Engineering. She specializes in semiconductor device engineering and leads Stanford’s Wide Bandgap (WBG) Lab, where her research focuses on high-efficiency power devices and advanced thermal management technologies. She earned her Ph.D. in Electrical and Computer Engineering from the University of California, Santa Barbara, in 2010, where she demonstrated the first vertical gallium nitride (GaN) transistor exhibiting switching behavior. Over two decades of research on vertical GaN devices have culminated in the industrial adoption of GaN CAVETs (by Kyocera) as a promising global solution for high-voltage applications. Before joining academia, she led the 900-V GaN HEMT development program at Transphorm (now Renesas). Her other notable research contributions include low-temperature diamond growth for thermal management and avalanche-based GaN devices, including IMPATT diode technology.
Professor Chowdhury received the 2025 Quantum Device Award for pioneering work on vertical GaN transistors and phonon-engineered interfaces, the 2023 SRC Technical Excellence Award for contributions to thermal interfaces, the 2020 Alfred P. Sloan Fellowship in Physics, and the 2016 Young Scientist Award at ISCS, among several other early-career honor. She is a Fellow of the IEEE and a Senior Fellow of the Precourt Institute for Energy at Stanford University.